In this article, we will explain the functionality of two very important electronic circuit elements: digital buffer and tri-state digital buffer.


At first glance, the functionality of a digital buffer may seem very simple: the value at its input is propagated to its output.

A buffer symbol with one input and one output. A truth table showing that the value at the input is the same as the value at the output.
Fig. 1 Buffer symbol and truth table

If the buffer does not change the logical value of the signal then what is its purpose? In order to explain the usefulness of a digital buffer, we must first get an understanding of the following terms:

Logic gate fan-out – the maximum number of gates that can be connected to an output of a gate, while maintaining the specified voltage levels of the logic signals.

The fan-out is directly related to the amount of current the output of the gate can source/sink. In large digital circuits, there is often a need to connect many gates to the output of a single gate. In these cases, we can use digital buffers in order to avoid the fan-out limitations. The buffers have higher fan-out capabilities when compared to standard logic gates.

Buffer Application

In Fig. 2 we can see an OR gate (Driving Logic Gate) that is driving N number of gates (Loads). If the OR gate has a fan-out of 10, but the circuit requires that it drives 20 gates, then we will have issues. If we load the driving logic gate with a higher number of gates that its capable of driving it may cause heating, voltage levels instability and overall reduced reliability of the circuit. On the right side of the figure we can see a solution using a buffer. In this scenario, the OR gate is driving only the buffer, and the buffer is driving all other gates.

Two schematics: On showing OR gate driving N number of logic gates and the other showing the same schematic but with a buffer put at the output of the OR gate
Fig. 2 Using a buffer for achieving higher fan-out in a digital circuit

Tri-State Buffer

The tri-state buffer functions just as a regular digital buffer, but with an additional capability that allows us to configure its output to a Hi-Z (high impedance) state.

Fig. 3 Tri-state buffer symbol and truth table

Tri-State Buffer Application

While the tri-state buffer can be used for the same applications described in the previous chapter, its enhanced functionality widens its usage. When the output of the buffer is in Hi-Z state it is basically disconnected (isolated) from the rest of the electric circuit. This makes it very useful when connecting multiple devices on a single bus, as its isolation prevents the occurrence of a short circuit event.

Five tri-state buffers connected on a single line
Fig. 4 Multiple tri-state buffers connected on a single bus

In Fig. 4 we can see five devices connected to a bus using tri-state buffers. At any single moment, only one of should drive the line and all others should be disabled (Hi-Z state). A device that sets its output to Hi-Z can read the value driven on the bus by other devices. In order words, only one device can write to the line, but all of the devices can read it.

Implementing Open Drain and Push-Pull Outputs

Tri-state buffers can be used for implementing two of the most common output stages – open drain and push-pull. Each configuration can be achieved by specific wiring of the tri-state buffer’s inputs. Open drain configuration requires a single transistor, while push-pull requires two transistors. The simplified schematic of a tri-state buffer shown below in Fig.5 contains these elements.

Schematic showing how a tri-state buffer is implemented using two MOS transistors and few logic gates
Fig. 5 Simplified schematic of tri-state

For achieving push-pull configuration, we should connect the enable (En) input of the tri-state buffer to logic 1 (VDD) (See Fig. 5). This will cause the output to always follow the input signal (Signal), and never go to Hi-Z state.

For achieving open drain configuration we can connect the input of the tri-state buffer to logic 0 (GND) and our actual input signal (Signal) to the En control input (See Fig. 5). Remember that the open drain output has two possible states: Logic 0 and Hi-Z. Using the above connections we achieve the following functionality: When Signal is logic 1, the En sees logic 0 (due to the inverter gate) and thus the output of the buffer is set to Hi-Z. When Signal is logic 0, the buffer is enabled and the output is set to the value of the input which in this case is tied to logic 0.

Fig. 5 Tri-state buffer configured as push-pull and open drain output


  • Buffers do not change the functionality of the digital logic circuit.
  • Buffers help overcome the limited fan-out of logic gates.
  • Tri-state buffers are used for connecting multiple devices on a single communication bus.
  • Tri-state buffers can be used as an output stage and configured as open-drain or push-pull.

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